The present invention relates to a field effect transistor, and more particularly, to a method of manufacturing a field effect transistor.
In general, a field effect transistor is composed of source and drain electrodes supplied with currents, an active layer formed therebetween and supplied with a current, and a gate electrode controlling the active layer with a voltage to thereby control the current flow.
In a metal semiconductor field effect transistor (MESFET) having such general structure, the characteristics of the current and voltage is determined by the following equations (1) and (2). ##EQU1## where x is the distance from the source electrode; y is the distance from the surface of the active layer;
Id is the drain current; PA1 z is the gate width; PA1 q is the electron charge quantity; PA1 t is the thickness of an active layer; PA1 v(x) is the movement velocity of the electron at the depth y; PA1 N(y) is the impurity concentration of the electron at the depth y; PA1 h(x) is the depth which is scarce of the electron concentration by the gate voltage within the active layer; and PA1 .di-elect cons.s is the dielectric constant of the active layer.
At this time, when the gate voltage V(h(x)) is applied, the value of the drain current Id can be obtained by finding the depth h(x) being scarce of the electron concentration from the equation (2) and substituting it for the equation (1).
As the field effect transistor having such current-voltage characteristics, there are a depletion mode field effect transistor (DFET) and an enhancement mode field effect transistor.
Here, the DFET is a device in which the lack of the electron concentration cannot fully isolate the active layer when the voltage of 0V is applied to the gate, so that the drain current flows.
Meantime, the EFET is a device in which the drain current cannot flow because the active layer is fully isolated.
The important difference between these devices is that the depths of the active layers are different from each other.
Particularly, in the EFET, it is difficult to obtain the active layer through the general method of forming the active layer, because the active layer is as thin as 500 .ANG., approximately.
Accordingly, the general method of forming the active layer will be described with reference to a conventional method.
FIG. 1 is a cross-sectional view showing the structure of a conventional field effect transistor.
Referring to FIG. 1, in the conventional field effect transistor, a buffer layer 2 of mesa shape is formed on a semiconductor substrate 1. Active layers 3, 4 and 5 are formed on buffer layer 2, sequentially.
Further, a gate electrode 7 is formed within a V-groove 6 formed in the center of active layers 3, 4 and 5.
Moreover, a source electrode 8 and a drain electrode 9 are formed on the active layers 4 and 5 of the high concentration region and on the both sides of mesa.
A method of forming the active layer in the conventional field effect transistor structure composed as described above will be explained, as follows.
The active layer is formed hitherto by using the chemical vapor deposition (CVD) method or the ion implantation method.
Here, according to the CVD method, it is relatively easy to manufacture the polymeric compound. Further, the metal organic vapor deposition method facilitating the mass production is used.
Here, the MOCVD method is a deposition method where the organic metal compound of the 3-group atom and the hydrogen compound of the 5-group atom are used as the raw material, using the hydrogen as the carrier gas. That is, the chemical reaction is made while the above raw materials are pyrolyzed on the heated substrate within the reaction chamber, so that an epitaxial layer of the solid state grows.
According to the MOCVD method, it is easy to manufacture the polymeric compound, and it is possible to mass-produce. However, the thickness and concentration of the deposited epitaxial layer is not formed uniformly over the entire of the layer.
Therefore, in case that a digital integrated circuit (IC) is manufactured by using such epitaxial growth method, the threshold voltage which is the important characteristics of the integrated circuit is not uniform. Thus, the entire yield of the circuit manufacture is reduced.
Further, there is a disadvantage that the manufacturing apparatus used for growing the epitaxial layer is expensive.
Meantime, the ion implantation method is a method that an atomic ion is implanted into a target, having so high energy as to penetrate the surface of the target.
According to the ion implantation method, a silicon is used as an n-type, a barium (Be) as a p-type, in the GaAs semiconductor. Further, using the energy of about 30.about.500 keV, the ion is implanted to the depth of 100.about.10000 .ANG. below the surface of GaAs, thereby forming the active layer.
At this time, the depth where the ion is implanted is controlled according to the magnitude of the ion energy. Thus, it is possible to select the suitable depth according to the use purpose.
Therefore, the ion implantation method is better than the MOCVD method in the uniformity aspect of the active layer, and have the good characteristics in the mass-production aspect.
However, according to the ion implantation method, it is necessary to precisely control the ion implantation. Further, the unit cost of production is increased because the manufacturing apparatus is expensive.
In addition, in the device used recently, the manufacture of the enhancement mode field effect transistor (EFET) having the thin active layer is required. Thus, there is a problem that the limit of the minimum energy appears during the ion implantation.
Meantime, as another method of forming the active layer, there is a diffusion method.
According to the diffusion method, the impurity can be doped with the thin thickness, as compared with the CVD method or the ion implantation method. Further, the steep of the impurity becomes high, thereby improving the current ratio of Ion/Ioff.
The diffusion method having such characteristics was used hitherto in a silicon, but scarcely used in a compound semiconductor. This is because the compound semiconductor has a low degree of heat tolerance.
Accordingly, in the present invention, an oxide film and a nitride film are used in order to solve the characteristics of the compound semiconductor having a low degree of heat tolerance. Further, a method of improving the characteristics having the steep impurity distribution will be used.